Bridge The Gap Global Consultancy http://bridgethegap.global/index.html Built with SitePad Sun, 25 Aug 2019 16:04:59 +0000 en-US hourly 1 SitePad Current Job Openings in VLSI http://bridgethegap.global/blog/current-job-openingsvlsi.html http://bridgethegap.global/blog/current-job-openingsvlsi/#respond Sun, 25 Aug 2019 15:44:53 +0000 http://bridgethegap.global/blog/current-job-openingsvlsi.html

For one of our reputed Billion Dollar Client MNC for Permanent Hire ( Name to be disclosed when contacted).

The Opportunities also involve On-site visits to Europe, Canada & South Korea for fixed time period based on requirements.

Salary offered : As per Industry Standards based on individual profile

RTL Design

Experience (years): 4+ years

Skills/Experience:

1. RTL design experience, familiarity with AHB/AXI buses, experience with spyglass(lint), CDC, core and chip integration

 

IP/SOC/UVM Verification

 

Experience (years): 4+ years

Skills/Experience:

1. Languages: Verilog, System Verilog

2. Methodology: UVM (preferred), OVM, VMM.

3. Knowledge of scripting (Perl, C-shell)

4. SVA will be a plus

5. Good general verification experience with good academy result.

Must Have:

6. SoC or IP Experience Languages: System Verilog

7. Methodologies: OVM/UVM/VMM DDR/USB/Ethernet/PCIE/Video/HDMI/MIPI/DSI/CSI

 

Processor/ARM Based SoC Verification

 

Experience (years): 5+ years

Skills/Experience:

1. Candidate must have expertise in System Verilog.

2. Experience in ARM base SoC Verification

3. Desirable if having worked on one or more of the designs like CortexM.

 

 

Physical Design 

 

Experience (years) : 5+ years

Skills/Experience:

1. Strong back ground of ASIC Physical Design: Floor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity.

2. Have some experience on advance Technology: 28nm, 40nm, 45nm, 65nm

3. Hands on experience in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS)

 

 

DFT Verification

 

Experience (years): 4+ years

Skills/Experience:

1. Scan insertion & ATPG using Fastscan/TestKompress /DFTCompiler/DFTMax/DFTAdvisor/TetraMax

2. Pattern Simulation with and without timing annotation & debugging

 

 

Post Silicon Verification 

 

Experience (years): 4+ years

Skills/Experience:

1. Processor architecture knowledge is a MUST. (ARM Processor knowledge is preferred.)

2. Hands on experience in “C” / Assembly coding is a MUST

3. Executing validation test plan Debugging Silicon Failures Debugging skill of embedded system Should handle Oscilloscope & Logic Analyzer Emulation knowledge will be preferred

4. ARM System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug.

 

]]>
http://bridgethegap.global/blog/current-job-openingsvlsi/feed/ 0